The present invention relates to a motor and a disk drive apparatus including the motor.
In recent years, motors wherein current paths are alternated electronically with plural transistors have been used widely as drive motors for office automation apparatuses and audio-visual apparatuses. These motors are included in disk drive apparatuses, such as optical disk drive apparatuses (DVD apparatuses, CD apparatuses, etc.) and magnetic disk drive apparatuses (HDD apparatuses, FDD apparatuses, etc.). A motor wherein current paths to windings are alternated with PNP power transistors and NPN power transistors is available as an example of the above-mentioned motors.
FIG. 26 shows a conventional motor, and its operation will be described below. A rotor 2011 has a field part formed by a permanent magnet. Three position detecting elements of a position detector 2041 detect the magnetic field of the field part of the rotor 2011. In other words, the position detector 2041 generates two sets of voltage signals, Kp1, Kp2 and Kp3, and Kp4, Kp5 and Kp6, from the three-phase output signals of the three position detecting elements in response to the rotation of the rotor 2011. A first distributor 2042 generates three-phase low-side signals Mp1, Mp2 and Mp3 responding with the voltage signals Kp1, Kp2 and Kp3 respectively to control the activation of the low-side NPN power transistors 2021, 2022 and 2023 shown in FIG. 26. A second distributor 2043 generates three-phase high-side signals Mp4, Mp5 and Mp6 responding with the voltage signals Kp4, Kp5 and Kp6 respectively to control the activation of the high-side PNP power transistors 2025, 2026 and 2027 shown in FIG. 26. As a result, three-phase drive voltages are supplied to windings 2012, 2013 and 2014.
In the conventional configuration, power loses of the power transistors are large, and heat generation at the motor and the disk drive apparatus causes problems. The NPN power transistors 2021, 2022 and 2023 and the PNP power transistors 2025, 2026 and 2027 supply drive voltages having desired amplitudes to the windings 2012, 2013 and 2014 by controlling the voltage across the emitter and the collector in an analogue manner. Each of the NPN power transistors 2021, 2022 and 2023 and the PNP power transistors 2025, 2026 and 2027 changes the voltage across the emitter and the collector depending on the change in the resistance value across the emitter and the collector. Therefore, a remaining voltage in each power transistor is large, and a large power loss produced by the product of the large remaining voltage and the conducted current is generated, resulting in heat generation at each power transistor. Since a recordable disk (a RAM disk, a rewritable disk, etc.) is susceptible to heat, the heat generation at the power transistors, i.e., the main heat sources of the disk drive apparatus, is desired to be reduced as low as possible in order to improve the reliability of recording and/or reproducing on/from the recordable disk.
In addition, since the position detector 2041 includes three position detecting elements for detecting the rotational position of the rotor 2011 so as to distribute drive currents to the windings, it is necessary to provide spaces for the position detecting elements. Furthermore, wire connection and the like for the elements become complicated, thereby raising the cost of the motor and the apparatus. By eliminating the position detecting elements, the motor can be made smaller, and the disk drive apparatus can be made thinner.
Furthermore, in the case of rewritable disk drive apparatuses, such as DVD-RAM/RW apparatuses, information is recorded and/or reproduced on/from a high-density disk. Therefore, it is desired to rotate the disk with reduced vibration during recording and/or reproducing on/from the disk. Moreover, it is necessary to rotate the disk at high speed with reduced acoustic noise in the case of reproducing from a DVD-ROM/CD-ROM disk. However, in a configuration without a position detecting element, it is very difficult to rotate the rotor and the disk with a low vibration and a low acoustic noise while reducing heat generation.
It has been strongly desired to develop a motor and/or a disk drive apparatus in which each of or all of these problems are solved. It is therefore an object of the present invention to solve the above-mentioned problems, respectively or concurrently and provide a motor and/or a disk drive apparatus that has the configuration suitable for reducing the power consumption and the acoustic noise.
Briefly stated the present invention comprises a motor comprising: a rotor which has a field part generating field fluxes; Q-phase windings, Q being an integer of 3 or more; voltage supplying means which includes two output terminals for supplying a DC voltage; power supplying means having Q first power transistors and Q second power transistors for supplying a power to said Q-phase windings, each of said Q first power transistors forming a current path between one output terminal side of said voltage supplying means and one of said Q-phase windings, and each of said Q second power transistors forming a current path between the other output terminal side of said voltage supplying means and one of said Q-phase windings; voltage detecting means for producing a detected pulse signal responding with terminal voltages of said Q-phase windings; state shifting means for shifting a holding state from one state to at least one other state in sequence responding with the detected pulse signal of said voltage detecting means; activation control means for controlling active periods of said Q first power transistors and said Q second power transistors responding with said holding state; and switching operation means for causing at least one power transistor among said Q first power transistors and said Q second power transistors to perform high-frequency switching corresponding to a command signal. The said state shifting means shifts said holding state from a first state to a second state after a first adjust time from detection of said detected pulse signal, and further shifts said holding state from said second state to a third state after a second adjust time from detection of said detected pulse signal, said second adjust time being larger than said first adjust time. The activation control means produces Q-phase first activation control signals and Q-phase second activation control signals responding with said holding state of said state shifting means or controlling said active periods of said Q first power transistors and said Q second power transistors, each of said active periods being larger than the period of 360/Q electrical degrees. The switching operation means includes: current detecting means for producing a current detected signal which responds with or corresponds to a current from said voltage supplying means to said Q-phase windings, and switching control means for producing a main switching pulse signal and, an auxiliary switching pulse signal which respond with said current detected signal and said command signal, providing a time between an effective period of said main switching pulse signal and an effective period of said auxiliary switching pulse signal, causing at least one of said Q first power transistors to become ON in the effective period of said main switching pulse signal, causing at least one of said Q second power transistors to become ON in the effective period of said auxiliary switching pulse signal, and executing high-frequency switching operation of at least one second power transistor among said Q second power transistors responding with said auxiliary switching pulse signal when two first power transistors among said Q first power transistors simultaneously execute high-frequency switching operation responding with said main switching pulse signal while at least another second power transistor among said Q second power transistors executes ON operation.
Another aspect of the invention comprises a motor comprising: a rotor which has a field part generating field fluxes; Q-phase windings, Q being an integer of 3 or more; voltage supplying means which includes two output terminals for supplying a DC voltage; power supplying means having Q first power transistors and Q second power transistors for supplying a power to said Q-phase windings, each of said Q first power transistors forming a current path between one output terminal side of said voltage supplying means and one of said Q-phase windings, and each of said Q second power transistors forming a current path between the other output terminal side of said voltage supplying means and one of said Q-phase windings; activation control means for controlling said Q first power transistors and, said V second power transistors; and switching operation means for causing at least one power transistor among said Q first power transistors and said Q second power transistors to perform high-frequency switching corresponding to a command signal. The activation control means determines active periods of said Q first power transistors and said Q second power transistors, each of said active periods being larger than the period of 360/Q electrical degrees. The switching operation means includes: current detecting means for producing a current detected signal which responds with or corresponds to a current from said voltage supplying means to said Q-phase windings. and switching control means for producing a main switching pulse signal and an auxiliary switching pulse signal which respond with said current detected signal and said command signal, providing a time between an effective period of said main switching pulse signal and an effective period of said auxiliary switching pulse signal, causing at least one of said Q first power transistors to become ON in the effective period of said main switching pulse signal, causing at least one of said Q second power transistors to become ON in the effective period of said auxiliary switching pulse signal, and executing high-frequency switching operation of at least one second power transistor among said Q second power transistors responding with said auxiliary switching pulse signal when two first power transistors among said Q first power transistors simultaneously execute high-frequency switching operation responding with said main switching pulse signal while at least another second power transistor among said Q second power transistors executes ON operation.
A further aspect of the invention comprises a disk drive apparatus comprising: a head for at least reproducing a signal from a disk or recording a signal on a disk; processing means for at least processing an output signal from said head and outputting a reproducing information signal, or processing a recording information signal and outputting a signal into said head; a rotor which has a field part generating field fluxes, and directly drives said disk; Q-phase windings, Q being an integer of 3 or more; voltage supplying means which include two output terminals for supplying a DC voltage; power supplying means having Q first power transistors and Q second power transistors for supplying a power to said Q-phase windings, each of said Q first power transistors forming a current path between one output terminal side of said voltage supplying means and one of said Q-phase windings. and each of said Q second power transistors forming a current path between the other output terminal side of said voltage supplying means and one of said Q-phase windings; voltage detecting means for producing a detected pulse signal responding with terminal voltages of said Q-phase windings; state shifting means for shifting a holding state from one state to at least one other state in sequence responding with the detected pulse signal of said voltage detecting means; activation control moans for controlling active periods of said Q first power transistors and said Q second power transistors responding with said holding state; and switching operation means for causing at least one power transistor among said Q first power transistors and said Q second power transistors to perform high-frequency switching corresponding to a command signal. The state shifting means shifts said holding state from a first state to a second state after a first adjust tine from detection of said detected pulse signal, and further shifts said holding state from said second state to a third state after a second adjust time from detection of said detected pulse signal, said second adjust time being larger than said, first adjust time. The activation control means produces Q-phase first activation control signals and Q-phase second activation control signals respondingxe2x80x99 with said holding state of said state shifting means for controlling said active periods of said Q first power transistors and said. Q second power transistors, each of said active periods being larger than the period of 360/Q electrical degrees. The switching operation means includes: current detecting means for producing a current detected signal which responds with or corresponds to a current from said voltage supplying means to said Q-phase windings and switching control means for producing a main switching pulse signal and an auxiliary switching pulse signal which respond with said current detected signal and said command signal, providing a time between an effective period of said main switching pulse signal and an effective period of said auxiliary switching pulse signal, causing at least one of said Q first power transistors to become ON in the effective period of said main switching pulse signal, causing at least one of said Q second power transistors to become ON in the effective period of said, auxiliary switching pulse signal, and executing high-frequency switching operation of at least one second power transistor among said Q second power transistors responding with said auxiliary switching pulse signal when two first power transistors among said Q first power transistors simultaneously execute high-frequency switching operation responding with said main switching pulse signal while at least another second power transistor among said Q second power transistors executes ON operation.
An additional aspect of the invention comprises a disk drive apparatus comprising; a head for at least reproducing a signal from a disk or recording a Signal on a disk; processing means for at least processing an output signal from said head and outputting a reproducing information signal, or processing a recording information signal and. outputting a signal into said head; a rotor which has a field part generating field fluxes, and directly drives said disk; Q-phase windings, Q being an integer of 3 or more; voltage supplying means which include two output terminals for supplying a DC voltage; power supplying means having Q first power transistors and Q second. power transistors for supplying a power to said Q-phase windings, each of said Q first power transistors forming a current path between one output terminal side of said voltage supplying means and one of said Q-phase windings, and each of said Q second power transistors forming a current path between the other output terminal side of said voltage supplying means and one of said Q-phase windings; activation control means for controlling said Q first power transistors and said Q second power transistors; and switching operation, means for causing at least one power transistor among said Q first power transistors and said Q second power transistors to perform high-frequency switching corresponding to a command signal. The activation control means determines active periods of said Q first power transistors and said Q second power transistors, each of said active periods being larger than the period of 360/Q electrical degrees. The switching operation means includes: current detecting means for producing a current detected signal which responds with or corresponds to a current from said voltage supplying means to said Q-phase windings, and switching control means for producing a main switching pulse signal and an auxiliary switching pulse signal which respond with said current detected signal and said command signal, providing a time between an effective period of said main switching pulse signal and an effective period of said auxiliary switching pulse signal, causing at least one of said Q first power transistors to become ON in the effective period of said main switching pulse signal, causing at least one of said Q second power transistors to become ON in the effective period of said auxiliary switching pulse signal, and executing high-frequency switching operation of at least one second power transistor among said Q second power transistors responding with said auxiliary switching pulse signal when two first power transistors among said Q first power transistors simultaneously execute high-frequency switching operation responding with said main switching pulse signal while at least another second power transistor among said Q second power transistors executes ON operation.